The present disclosure herein relates to a semiconductor memory device, and more particularly, to a volatile memory device outputting an alert signal by detecting a number of disturbances and performing a refresh operation and a refresh method thereof.
Semiconductor memory devices may be generally classified into volatile memory devices and non-volatile memory devices. A volatile memory device has faster read and write speeds but loses its stored content when there is no external power supply. On the contrary, a non-volatile memory device retains its stored data even when there is no power supply.
In order to meet user's demands for high performance, a capacity and speed of a semiconductor memory device used in various electronic systems are drastically increased. A representative example of the volatile memory device includes Dynamic Random Access Memory (DRAM). The DRAM stores data by using charges in a cell capacitor. Since the charges stored in the cell capacitor may leak as time elapses, the DRAM has finite data retention characteristics.
According to the finite data retention characteristics, in order to maintain the stored data, a refresh operation is performed. The DRAM maintains the data stored in the cell capacitor through the refresh operation. As the degree of integration is increased and manufacturing techniques are developed, a distance between cells of the DRAM becomes gradually narrower. Also, due to the reduction of the distance between cells, disturbance from adjacent cells or word lines serves as an important data integrity factor. Even when the disturbance affects a specific cell intensively, it is difficult for a random access memory such as DRAM to limit an access to a specific address. Therefore, disturbance may occur in a specific cell, and this affects refresh characteristics thereof.